dSDR — Direct-Sampling Multi-Channel SDR
Phase-coherent direct-sampling SDR platform with Up to 6 RX / 4 TX channels, wideband RF coverage, and high-speed PCIe or 100GbE transport.
Why dSDR
dSDR is a direct-sampling embedded SDR platform for high-channel-count, phase-coherent RF systems. Its architecture minimizes LO leakage and IQ imbalance while improving linearity, phase noise, and integration flexibility. Designed for massive MIMO, wideband RF acquisition, and Platform-grade signal processing deployments.
Key capabilities
Direct-Sampling RF Architecture
Direct-sampling design reduces RX/TX LO leakage and IQ imbalance while improving linearity, phase noise, and system flexibility.
Phase-Coherent Multi-Channel Operation
Up to 6 RX / 4 TX channels for coherent acquisition, transmission, beamforming, and massive MIMO applications.
Wideband Signal Processing
up to 1 GHz instantaneous bandwidth, with up to 1 GHz available on request for demanding RF workloads.
High-Speed Data Transport
M.2 3080 M-Key · PCIe 4.0 ×4 enables approximately 63 Gbit/s data throughput, with 100GbE available on XCKU5P configurations.
Massive MIMO Scaling
External synchronization and dMASS support enable scalable 32×32, 64×64, and larger MIMO systems.
FPGA-Accelerated DSP
UltraScale+ FPGA resources support high-throughput DSP pipelines, custom protocol accelerators, and real-time signal processing.
System architecture
dSDR integrates direct-sampling RFICs, UltraScale+ FPGA processing, high-speed PCIe or Ethernet transport, and external synchronization into a compact M.2 2242 embedded platform. The AFE7900/7901/7903/7950 RFIC family enables wideband, multi-channel operation across model-dependent frequency ranges, while the FPGA fabric provides deterministic DSP, data framing, synchronization, and transport acceleration.
Software & Platform Ecosystem
dSDR integrates with both native Wavelet Lab platform software and industry-standard SDR workflows.
Wavelet SDR / WebSDR Platform
Browser-based SDR control, distributed DSP execution, remote RF operation, and high-throughput streaming workflows.
High-Speed Host Libraries
Custom PCIe driver and host libraries for low-latency, high-throughput communication with user-space data paths and kernel-bypass-oriented architecture.
SDR Frameworks & GPU Acceleration
GNU Radio, SoapySDR, srsRAN, Amarisoft, custom C/C++ and Python APIs. GPUDirect support in progress; vector CPU/GPU acceleration primitives available.
Applications & Use Cases
5G / 6G Wireless Platform
High-order MIMO radio systems compatible with Amarisoft and srsRAN for next-generation cellular research and deployment.
Massive MIMO Radio Links
dMASS synchronization enables scalable 32×32, 64×64, and larger coherent MIMO architectures.
Wideband RF Monitoring
High-bandwidth RF acquisition for spectrum monitoring, signal analysis, and advanced RF sensing environments.
Embedded High-Performance Analysis
Compact M.2 form factor for integration into high-performance embedded RF analysis systems.
High-Speed Data Link
PCIe 4.0 ×4 or optional 100GbE transport for high-throughput SDR streaming and host-side processing.
Legacy SDR Workflows
Integration with GNU Radio, srsRAN, and other tools through SoapySDR.
Technical specifications
| Frequency Range | Up to 12 GHz (model-dependent) |
| Channels | Up to 6 RX / 4 TX |
| Instantaneous Bandwidth | up to 1 GHz |
| sampling rate | 0.1 MSPS – 500 MSPS · up to 1 GSPS on request |
| RFIC | AFE7900 / AFE7901 / AFE7903 / AFE7950 |
| FPGA | AMD Artix UltraScale+ XCAU15P or Kintex UltraScale+ XCKU5P |
| Interface | M.2 3080 M-Key · PCIe 4.0 ×4 |
| Network Option | 100GbE option available on XCKU5P configuration |
| Power | 6–15 W typ. · 20 W max |
| Input Power Range | 2.85 – 5.5 V |
| Synchronization | External clock synchronization for multi-board and massive MIMO arrays |
Part of the Unified Wavelet SDR Platform
dSDR shares a unified software and FPGA architecture with uSDR, xSDR, and sSDR — enabling portability across embedded, wideband, multi-channel, and distributed RF systems.
| Spec | uSDR | xSDR | sSDR | dSDR |
|---|---|---|---|---|
| Frequency Range | 70 MHz – 3.8 GHz | 30 MHz – 3.8 GHz | 30 MHz – 11 GHz | Up to 12 GHz (model-dependent) |
| Channels | 2×2 | 2 RX / 2 TX | 2 RX / 2 TX | Up to 6 RX / 4 TX |
| Bandwidth | 56 MHz | Up to 90 MHz | 0.5 – 120 MHz | up to 1 GHz |
| Interface | M.2 2230 A+E key · USB 2.0 · PCIe 2.0 ×2 | M.2 2230 A+E key · USB 2.0 · PCIe 2.0 ×2 | M.2 2242 M-Key · PCIe 3.0 ×4 · USB 2.0 | M.2 3080 M-Key · PCIe 4.0 ×4 |
| Form factor | M.2 2230 | M.2 2230 | M.2 2242 | M.2 3080 |
| Sync | 10 MHz / PPS | External clock | TCXO / ext | External clock |
| Model | RFIC | FPGA | Frequency Range | 100GbE | PCIe | RX | TX |
|---|---|---|---|---|---|---|---|
| 1B03 | AFE7903 | XCAU10P | 10–7400 MHz | No | PCIe 4.0 | 2 | 2 |
| 1A01 | AFE7901 | XCAU15P | 10–7400 MHz | No | PCIe 4.0 | 4 | 4 |
| 1A00 | AFE7900 | XCAU15P | 10–7400 MHz | No | PCIe 4.0 | 6 | 4 |
| 1A50 | AFE7950 | XCAU15P | 600–12000 MHz | No | PCIe 4.0 | 6 | 4 |
| 1K50 | AFE7950 | XCKU5P | 600–12000 MHz | Yes | PCIe 3.0 | 6 | 4 |
Pair with the Front-End Board
Extend your SDR with a configurable RF front-end for filtering, amplification and protection.
Front End & Breakout Board for sSDR and dSDR
The Front End (FE) is a modular high-performance adapter board for Wavelet Lab sSDR and dSDR modules. It provides up to 4 RX and 4 TX RF paths, synchronized operation, fast TX/RX switching for TDD applications, and integrated RF front-end components including low-noise amplifiers, power amplifiers, filters, and switches. The board is intended for users building multi-channel SDR systems where RF routing, external antenna access, synchronization, and repeatable lab or field integration are required. A lighter Breakout Board version is also available for users who want the same module-carrier concept without integrated RF front-end components. This version is better suited for custom RF front-end development, lab integration, and users who want to connect their own RF chains.
Get a quote, eval unit or technical brief for dSDR.
Direct conversation with the engineering team.