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    sSDR — Wideband Embedded SDR Platform

    High-performance multi-channel SDR platform for wideband RF acquisition, synchronization, and real-time signal processing.

    Frequency Range
    30 MHz – 11 GHz
    Channels
    2 RX / 2 TX (full duplex)
    Instantaneous Bandwidth
    Up to 120 MHz
    sampling rate
    Up to 100 MSPS
    FPGA
    AMD Artix UltraScale+ (XCAU7P)
    Interface
    M.2 2242 M-Key · PCIe 3.0 ×4 · USB 2.0
    sSDR — Wideband Embedded SDR Platform
    sSDR
    01Overview

    Why sSDR

    sSDR is a compact wideband SDR platform combining extended RF coverage, FPGA acceleration, and high-speed host interfaces in an embedded M.2 form factor. Designed for advanced wireless Platform, spectrum monitoring, radar research, and distributed RF systems. From embedded wireless Platform to high-performance RF sensing systems.

    Wideband RF acquisition
    Wireless Platform and Open RAN
    Radar and sensing research
    Spectrum monitoring systems
    Distributed synchronized SDR deployments
    FPGA-accelerated DSP applications
    00Capabilities

    Key capabilities

    K/01

    Wideband RF Coverage

    30 MHz to 11 GHz RF coverage supporting wireless, sensing, radar, and spectrum analysis applications.

    K/02

    Multi-Channel SDR

    Dual RX/TX architecture enabling coherent signal acquisition, transmission, and synchronized processing.

    K/03

    FPGA DSP Acceleration

    AMD UltraScale+ FPGA architecture for high-throughput DSP pipelines, transport, and custom acceleration blocks.

    K/04

    Synchronization & Timing

    GPS, 1PPS, and external clock synchronization for distributed SDR systems and coherent multi-device operation.

    K/05

    Embedded High-Speed Integration

    PCIe Gen3 ×4 and USB interfaces integrated into a compact M.2 embedded form factor.

    K/06

    WebSDR & Distributed Operation

    Remote SDR operation, distributed DSP execution, and collaborative RF analysis through the WebSDR platform.

    03Architecture

    System architecture

    sSDR integrates RF front-end, synchronization Platform, FPGA acceleration, and host interfaces into a compact wideband SDR module. The LMS7002M and LMS8001 RF architecture enables coverage from 30 MHz to 11 GHz, paired with FPGA-based DSP pipelines for real-time signal acquisition, processing, and transport.

    BLOCK · 01
    Wideband RF Front-End
    BLOCK · 02
    FPGA DSP Pipeline
    BLOCK · 03
    Synchronization & Timing
    BLOCK · 04
    PCIe / USB Host Interface
    04Software

    Software & Platform Ecosystem

    sSDR integrates with both native WebSDR workflows and industry-standard SDR frameworks.

    S/01

    WebSDR Platform

    Browser-based SDR control, distributed DSP execution, spectrum analysis, and remote RF operation.

    S/02

    GNU Radio · SoapySDR · srsRAN / Amarisoft

    Compatible with industry-standard SDR frameworks plus custom C/C++ and Python APIs.

    S/03

    Linux · Embedded · PCIe hosts

    Host-side support across Linux, embedded compute platforms, and PCIe host systems.

    05Use cases

    Applications & Use Cases

    UC/01

    Private Wireless Platform

    Private LTE/5G systems and Open RAN deployments using synchronized SDR Platform.

    UC/02

    Spectrum Monitoring

    Wideband RF acquisition and real-time spectrum analysis across complex RF environments.

    UC/03

    Radar & Sensing Research

    Advanced waveform generation, synchronized acquisition, and FPGA-accelerated signal processing for radar research.

    UC/04

    Distributed SDR Systems

    M.2 2242 SDR architectures with coherent timing and synchronization.

    UC/05

    FPGA DSP Platforms

    Custom FPGA acceleration pipelines for DSP, transport, protocol handling, and RF processing.

    06Specifications

    Technical specifications

    Frequency Range30 MHz – 11 GHz
    Channels2 RX / 2 TX (full duplex)
    Instantaneous BandwidthUp to 120 MHz
    sampling rate Up to 100 MSPS
    RFICLMS7002M + LMS8001
    FPGAAMD Artix UltraScale+ (XCAU7P)
    InterfaceM.2 2242 M-Key · PCIe 3.0 ×4 · USB 2.0
    SynchronizationGPS / 1PPS / external reference
    Reference ClockInternal 26 MHz TCXO or External clock
    PowerEmbedded low-power architecture
    07Compare

    Part of the Unified Wavelet SDR Platform

    sSDR shares a unified FPGA and software architecture with uSDR, xSDR, and dSDR platforms — enabling portability across embedded, wideband, and distributed RF systems.

    SpecuSDRxSDRsSDRdSDR
    Frequency Range70 MHz – 3.8 GHz30 MHz – 3.8 GHz30 MHz – 11 GHzUp to 12 GHz (model-dependent)
    Channels2×22 RX / 2 TX2 RX / 2 TXUp to 6 RX / 4 TX
    Bandwidth56 MHzUp to 90 MHz0.5 – 120 MHz up to 1 GHz
    InterfaceM.2 2230 A+E key · USB 2.0 · PCIe 2.0 ×2M.2 2230 A+E key · USB 2.0 · PCIe 2.0 ×2M.2 2242 M-Key · PCIe 3.0 ×4 · USB 2.0M.2 3080 M-Key · PCIe 4.0 ×4
    Form factorM.2 2230M.2 2230M.2 2242M.2 3080
    Sync10 MHz / PPSExternal clockTCXO / extExternal clock
    Platform Revisions

    sSDR Rev2

    Previous Generation Platform

    Rev2 supports the same synchronization and distributed RF workflows as Rev3 while utilizing an AMD Xilinx XC7A50T FPGA and an M-Key · PCIe 3.0/4.0 ×4 USB 2.0 interface.

    The platform remains suitable for embedded RF development, wireless infrastructure research, synchronized SDR arrays, and custom SDR integration workflows.

    FPGA
    AMD Xilinx XC7A50T
    Form Factor
    M.2 2242
    Interface
    M-Key · PCIe 3.0/4.0 ×4 USB 2.0
    • Shared Wavelet SDR software ecosystem
    • Compatible with GNU Radio, SoapySDR, and srsRAN workflows
    • Wideband embedded SDR architecture

    sSDR Rev3 remains the current production platform with expanded capabilities and updated architecture.

    Next step

    Get a quote, eval unit or technical brief for sSDR.

    Direct conversation with the engineering team.